JPH0562469B2 - - Google Patents

Info

Publication number
JPH0562469B2
JPH0562469B2 JP58218236A JP21823683A JPH0562469B2 JP H0562469 B2 JPH0562469 B2 JP H0562469B2 JP 58218236 A JP58218236 A JP 58218236A JP 21823683 A JP21823683 A JP 21823683A JP H0562469 B2 JPH0562469 B2 JP H0562469B2
Authority
JP
Japan
Prior art keywords
wiring
cell
input
rows
basic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58218236A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60110137A (ja
Inventor
Juji Kitamura
Ichiro Nakamu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP58218236A priority Critical patent/JPS60110137A/ja
Publication of JPS60110137A publication Critical patent/JPS60110137A/ja
Publication of JPH0562469B2 publication Critical patent/JPH0562469B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP58218236A 1983-11-18 1983-11-18 半導体装置 Granted JPS60110137A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58218236A JPS60110137A (ja) 1983-11-18 1983-11-18 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58218236A JPS60110137A (ja) 1983-11-18 1983-11-18 半導体装置

Publications (2)

Publication Number Publication Date
JPS60110137A JPS60110137A (ja) 1985-06-15
JPH0562469B2 true JPH0562469B2 (en]) 1993-09-08

Family

ID=16716730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58218236A Granted JPS60110137A (ja) 1983-11-18 1983-11-18 半導体装置

Country Status (1)

Country Link
JP (1) JPS60110137A (en])

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787240B2 (ja) * 1985-10-22 1995-09-20 日本電気株式会社 半導体集積回路
US4786613A (en) * 1987-02-24 1988-11-22 International Business Machines Corporation Method of combining gate array and standard cell circuits on a common semiconductor chip
JPH01207947A (ja) * 1988-02-15 1989-08-21 Nec Corp 半導体集積回路装置およびその設計方法
JP2714723B2 (ja) * 1991-03-15 1998-02-16 シャープ株式会社 半導体集積回路装置の製造方法
CN110637358B (zh) 2017-05-15 2022-09-23 株式会社索思未来 半导体集成电路装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182242A (ja) * 1982-04-19 1983-10-25 Nec Corp 半導体集積回路装置

Also Published As

Publication number Publication date
JPS60110137A (ja) 1985-06-15

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